

`timescale 1ns/1ns
module Matrix_Generate_3X3_1Bit
#(
	parameter	[10:0]	IMG_HDISP = 11'd1080,	
	parameter	[10:0]	IMG_VDISP = 11'd720
)
(
	
	input				clk,  				
	input				rst_n,				

	
	input				per_frame_v,	
	input				per_frame_h,		
	input				per_img_Bit,		

	
	output				matrix_frame_v,	
	output				matrix_frame_h,	
	output	reg			matrix_p11, matrix_p12, matrix_p13,	
	output	reg			matrix_p21, matrix_p22, matrix_p23,
	output	reg			matrix_p31, matrix_p32, matrix_p33
);




wire	row1_data;	
wire	row2_data;	
reg		row3_data;	
always@(posedge clk or negedge rst_n)
begin
	if(!rst_n)
		row3_data <= 0;
	else 
		begin
		if(per_frame_h)
			row3_data <= per_img_Bit;
		else
			row3_data <= row3_data;
		end	
end


wire	shift_clk_en = per_frame_h;
Line_Shift_RAM_1Bit 
#(
	.RAM_Length	(IMG_HDISP)
)
u_Line_Shift_RAM_1Bit
(
	.clock		(clk),
	.clken		(shift_clk_en),	

	.shiftin	(row3_data),	
	.taps0x		(row2_data),	
	.taps1x		(row1_data),	
	.shiftout	()
);


reg	[1:0]	per_frame_v_r;
reg	[1:0]	per_frame_h_r;	
always@(posedge clk or negedge rst_n)
begin
	if(!rst_n)
		begin
		per_frame_v_r <= 0;
		per_frame_h_r <= 0;
		end
	else
		begin
		per_frame_v_r 	<= 	{per_frame_v_r[0], 	per_frame_v};
		per_frame_h_r 	<= 	{per_frame_h_r[0], 	per_frame_h};
		end
end


wire	read_frame_href		=	per_frame_h_r[0];	
assign	matrix_frame_v 	= 	per_frame_v_r[1];
assign	matrix_frame_h 	= 	per_frame_h_r[1];



always@(posedge clk or negedge rst_n)
begin
	if(!rst_n)
		begin
		{matrix_p11, matrix_p12, matrix_p13} <= 3'b0;
		{matrix_p21, matrix_p22, matrix_p23} <= 3'b0;
		{matrix_p31, matrix_p32, matrix_p33} <= 3'b0;
		end
	else if(read_frame_href)	//Shift_RAM 数据读时钟
		begin
		{matrix_p11, matrix_p12, matrix_p13} <= {matrix_p12, matrix_p13, row1_data};	//第一行shift输入
		{matrix_p21, matrix_p22, matrix_p23} <= {matrix_p22, matrix_p23, row2_data};	//第二行shift输入
		{matrix_p31, matrix_p32, matrix_p33} <= {matrix_p32, matrix_p33, row3_data};	//第三行shift输入
		end
	else
		begin
		{matrix_p11, matrix_p12, matrix_p13} <= 3'b0;
		{matrix_p21, matrix_p22, matrix_p23} <= 3'b0;
		{matrix_p31, matrix_p32, matrix_p33} <= 3'b0;
		end
end

endmodule
